MEPs

MEPs are MyHDL Enhancement Proposals. They drive the development of major new features.

1	MEP Purpose and Guidelines

100	Creating generators with decorators
101	User-defined Verilog code
103	Tristate and bidirectional signals
105	Shadow signals
106	Modular bit vector types
108	Conversion of Top-Level Methods
109	Automatic inference of the reset behavior

107	Conversion of Interfaces
110	Keep hierarchy in conversion
111	Fixed-point type
113	Signal Naming Delimiters
114	The block decorator
115	How to import the myhdl library